AMD Epyc 2: Rome allegedly comes with 9 dies

AMD Epyc Zen 2
(Picture: AMD)

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The new Epyc generation from AMD called Rome will soon be on the market. The processor is said to have 9 dies with a total of 64 cores.

MCM is AMD’s saviour

AMD is currently doing very well in the processor business. While the Ryzen processors are becoming more and more popular in the end customer market and more and more notebooks are using Ryzen, the server market is also making good progress. The second generation of Epyc processors is expected to be introduced soon. With Epyc 2, AMD for the first time relies on the 7nm production and pushes its MCM design further. While Intel is currently holding on to a single die, its competitor Zen has for the first time opted for a multi-chip module design. Several dies are interconnected via an interconnect called Infinity Fabric, and operate as one large processor. This allows AMD to interconnect dies with eight cores each to form larger processors. For example, there are Epyc and Threadripper processors with up to four dies and 32 cores.

For AMD, this approach is primarily very inexpensive. Dies with only eight cores are significantly cheaper to produce than a 28-core die from Intel. In addition, faulty or worse dies can also be used in other products with fewer cores or less clock speed. Thus, the yield from the production is much higher. This allows AMD to offer lower prices and produce more efficiently. A bottleneck in production, such as Intel is currently experiencing, is therefore much less likely. The Epyc server division in particular is becoming increasingly popular as a result. The processors will soon arrive in the second generation and improve the MCM approach once again.

Epyc 2 comes with 9 Dies

Due to the 7nm production, the processor dies shrink once again. According to first rumors, AMD could have increased the number of cores in the dies to 16 instead of 8 in order to get a total of 64 cores in the Epyc 2 processors. However, the manufacturer is taking a different path. Production in the 7nm process also increases the costs and susceptibility to errors, while the yield drops significantly. However, since the chips are smaller, more of them fit on a 300mm wafer, which is why the costs decrease in this way.

As dies are much easier to produce with eight cores, there will be no dies with 16 cores, according to a report by SemiAccurate. Instead, the new Epyc 2 processors will use up to eight 7nm dies with eight processor cores each. A ninth chip, which could be produced in 14nm, is then the evolution of the Infinity Fabric. It will take over the complete management of the eight core dies, memory connectivity, I/O and caches. With this, AMD has again significantly changed the architecture, as this central control element also takes over memory management. Rome would no longer rely on NUMA, where each die controlled its own RAM and gave the other dies access to it. Instead, the central memory controller should keep the latencies the same for all dies. This could make workloads that were previously a problem for Epyc much faster.

Another socket for Rome?

SemiAccurate also has some other information regarding Rome. Between Naples, the first generation of Epyc, and Rome there actually was supposed to be another generation called Starship with up to 48 cores. However, AMD has apparently decided to cancel Starship and go for Rome. Normally there are also two generations per socket in the server area. According to SemiAccurate, it is therefore likely that Rome already uses a new socket, which then already works with PCIe 4.0. Rome should already support PCIe 4.0, but not CCIX yet. The even faster connection, which works with 25 GB/s instead of 16 GB/s, should be supported by the successor Milan, which should run on the same socket. For Rome and Milan, AMD allegedly still uses DDR4 memory. DDR5 and a 10-channel interface should come first with the next generation Genoa, which then gets a new socket.

Concrete information about Epyc 2 will probably be available in the next few days. AMD is organizing an event in San Francisco, at which first views on the upcoming data center products will be given. Specifically it is about the 7nm production and thus Rome and the graphic architecture Vega, which will be re-released as Vega 20 in 7nm.

About Florian Maislinger 1222 Articles
Florian Maislinger is author and founder of PC Builder's Club. As a skilled IT engineer, he is very familiar with computers and hardware and has been a technology lover since childhood. He is mainly responsible for the news and our social media channels.

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